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8752cy www.idt.com rev. c july 2, 2010 1 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer b lock d iagram p in a ssignment 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 gnd qb1 qb0 v ddo v ddo qa3 qa2 gnd div_selb0 div_selb1 div_sela0 div_sela1 mr/noe clk0 gnd fb_in v ddo qa1 qa0 gnd clk1 v dd v dda clk_sel v ddo qb2 qb3 gnd gnd nc pll_sel v dd ICS8752 32-lead lqfp 7mm x 7mm x 1.4mm package body y package top view 2 4 6 8 12 pll phase detector pll_sel fb_in clk0 clk1 clk_sel div_sela1 div_sela0 div_selb1 div_selb0 mr/noe qa0 qa1 qa2 qa3 qb0 qb1 qb2 qb3 0 1 1 0 00 01 10 11 00 01 10 11 vco g eneral d escription the ICS8752 is a low voltage, low skew lvcmos clock generator. with output frequencies up to 240mhz, the ICS8752 is targeted for high performance clock applcations. along with a fully integrated pll, the ICS8752 contains frequency configurable outputs and an external feedback input for regenerating clocks with ?zero delay?. dual clock inputs, clk0 and clk1, support redundant clock applications. the clk_sel input determines which refer- ence clock is used. the output divider values of bank a and b are controlled by the div_sela0:1, and div_selb0:1, respectively. for test and system debug purposes, the pll_sel input allows the pll to be bypassed. when high, the mr/noe input resets the internal dividers and forces the outputs to the high impedance state. the low impedance lvcmos outputs of the ICS8752 are designed to drive terminated transmission lines. the effective fanout of each output can be doubled by utilizing the ability of each output to drive two series terminated transmission lines. f eatures ? fully integrated pll ? eight lvcmos outputs, 7 typical output impedance ? selectable lvcmos clk0 or clk1 inputs for redundant clock applications ? input/output frequency range: 18.33mhz to 240mhz at v cc = 3.3v 5% ? vco range: 220mhz to 480mhz ? external feedback for ?zero delay? clock regeneration ? cycle-to-cycle jitter: 75ps (maximum), (all outputs are the same frequency) ? output skew: 100ps (maximum) ? bank skew: 55ps (maximum) ? full 3.3v or 2.5v supply voltage ? 0c to 70c ambient operating temperature ? available in both standard and lead-free rohs-compliant packages
8752cy www.idt.com rev. c july 2, 2010 2 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer t able 1. p in d escriptions t able 2. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k c d p e c n a t i c a p a c n o i t a p i s s i d r e w o p ) t u p t u o r e p ( v a d d v , d d v , o d d v 5 6 4 . 3 =3 2f p r t u o e c n a d e p m i t u p t u o 7 r e b m u ne m a ne p y tn o i t p i r c s e d 2 , 1 , 0 b l e s _ v i d 1 b l e s _ v i d t u p n in w o d l l u p . 3 e l b a t n i d e b i r c s e d s a b k n a b r o f s e u l a v r e d i v i d t u p t u o s e n i m r e t e d . s l e v e l e c a f r e t n i l t t v l / s o m c v l 4 , 3 , 0 a l e s _ v i d 1 a l e s _ v i d t u p n in w o d l l u p . 3 e l b a t n i d e b i r c s e d s a a k n a b r o f s e u l a v r e d i v i d t u p t u o s e n i m r e t e d . s l e v e l e c a f r e t n i l t t v l / s o m c v l 5e o n / r mt u p n in w o d l l u p e r a s t u p t u o e h t d n a t e s e r e r a s r e d i v i d l a n r e t n i e h t , h g i h c i g o l n e h w s t u p t u o e h t d n a d e l b a s i d s i t e s e r r e t s a m e h t , w o l c i g o l n e h w . d e l b a s i d . s l e v e l e c a f r e t n i l t t v l / s o m c v l . d e l b a n e e r a 60 k l ct u p n in w o d l l u p. s l e v e l e c a f r e t n i l t t v l / s o m c v l . t u p n i k c o l c , 7 1 , 3 1 , 7 9 2 , 8 2 , 4 2 d n gr e w o p. d n u o r g y l p p u s r e w o p 8n i _ b ft u p n in w o d l l u p . " y a l e d o r e z " h t i w s k c o l c g n i t a r e n e g r o f r o t c e t e d e s a h p o t t u p n i k c a b d e e f . s l e v e l e c a f r e t n i l t t v l / s o m c v l 9l e s _ k l ct u p n in w o d l l u p r o t c e t e d e s a h p s a 1 k l c r o 0 k l c n e e w t e b s t c e l e s . t u p n i t c e l e s k c o l c . 1 k l c s t c e l e s , h g i h n e h w . 0 k l c s t c e l e s , w o l n e h w . e c n e r e f e r . s l e v e l e c a f r e t n i l t t v l / s o m c v l 0 1v a d d r e w o p. n i p y l p p u s g o l a n a 2 3 , 1 1v d d r e w o p. s n i p y l p p u s e r o c 2 11 k l ct u p n in w o d l l u p. s l e v e l e c a f r e t n i l t t v l / s o m c v l . t u p n i k c o l c , 5 1 , 4 1 9 1 , 8 1 , 1 a q , 0 a q 3 a q , 2 a q t u p t u o 7 . s t u p t u o k c o l c a k n a b . e c n a d e p m i t u p t u o l a c i p y t . s l e v e l e c a f r e t n i l t t v l / s o m c v l , 0 2 , 6 1 5 2 , 1 2 v o d d r e w o p. s n i p y l p p u s t u p t u o , 3 2 , 2 2 7 2 , 6 2 , 1 b q , 0 b q 3 b q , 2 b q t u p t u o 7 . s t u p t u o k c o l c b k n a b . e c n a d e p m i t u p t u o l a c i p y t . s l e v e l e c a f r e t n i l t t v l / s o m c v l 0 3c nd e s u n u. t c e n n o c o n 1 3l e s _ l l pt u p n ip u l l u p . s r e d i v i d e h t o t t u p n i e h t s a 1 k l c r o 0 k l c d n a l l p e h t n e e w t e b s t c e l e s . 1 k l c r o 0 k l c s t c e l e s w o l n e h w . l l p s t c e l e s h g i h n e h w . s l e v e l e c a f r e t n i l t t v l / s o m c v l : e t o n p u l l u p d n a n w o d l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t r e f e r
8752cy www.idt.com rev. c july 2, 2010 3 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer t able 3. c ontrol i nput f unction t able t able 4a. qa o utput f requency w /fb_in = qb s t u p n is t u p t u o n i _ b f _ v i d 1 b l e s _ v i d 0 b l e s t u p t u o b q e d o m r e d i v i d ) 2 e t o n ( ) z h m ( 1 k l c , 0 k l c ) 1 e t o n ( _ v i d 1 a l e s _ v i d 0 a l e s t u p t u o a q e d o m r e d i v i d r e i l p i t l u m a q ) 2 e t o n ( m u m i n i mm u m i x a m b q00 4 5 50 2 1 00 2 2 01 4 1 10 6 7 6 6 . 0 11 8 5 . 0 b q01 6 6 6 . 6 30 8 00 2 3 01 4 5 . 1 10 6 1 11 8 5 7 . 0 b q10 8 5 . 7 20 6 00 2 4 01 4 2 10 6 3 3 . 1 11 8 1 b q11 2 1 3 3 . 8 10 4 01 2 6 01 4 3 10 6 2 11 8 5 . 1 . z h m 0 8 4 o t z h m 0 2 2 s i e g n a r y c n e u q e r f o c v : 1 e t o n ; r e i l p i t l u m e h t s e m i t y c n e u q e r f x k l c o t l a u q e y c n e u q e r f t u p t u o a q : 2 e t o n . x k l c o t l a u q e y c n e u q e r f t u p t u o b q s t u p n is t u p t u o e o n / r ml e s _ l l pl e s _ k l c _ v i d 1 a l e s _ v i d 0 a l e s _ v i d 1 b l e s _ v i d 0 b l e s x a qx b q 1x x x x x x z - i hz - i h 01x 0 0 0 0 2 / o c v f4 / o c v f 01x 0 1 0 1 4 / o c v f6 / o c v f 01x 1 0 1 0 6 / o c v f8 / o c v f 01x 1 1 1 1 8 / o c v f2 1 / o c v f 00 0 0 0 0 0 2 / 0 k l c f4 / 0 k l c f 00 0 0 1 0 1 4 / 0 k l c f6 / 0 k l c f 00 0 1 0 1 0 6 / 0 k l c f8 / 0 k l c f 00 0 1 1 1 1 8 / 0 k l c f2 1 / 0 k l c f 00 1 0 0 0 0 2 / 1 k l c f4 / 1 k l c f 00 1 0 1 0 1 4 / 1 k l c f6 / 1 k l c f 00 1 1 0 1 0 6 / 1 k l c f8 / 1 k l c f 00 1 1 1 1 1 8 / 1 k l c f2 1 / 1 k l c f . d e l b a s i d e r a s t u p u o l l a , h g i h s i e o n / r m n e h w . w o l s i e o n / r m , n o i t a r e p o l a m r o n r o f : e t o n
8752cy www.idt.com rev. c july 2, 2010 4 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer t able 4b. qb o utput f requency w /fb_in = qa s t u p n is t u p t u o n i _ b f _ v i d 1 a l e s _ v i d 0 a l e s a qt u p t u o e d o m r e d i v i d ) 2 e t o n ( ) z h m ( 1 k l c , 0 k l c ) 1 e t o n ( _ v i d 1 b l e s _ v i d 0 b l e s t u p t u o b q e d o m r e d i v i d r e i l p i t l u m b q ) 2 e t o n ( m u m i n i mm u m i x a m a q00 2 0 1 10 4 2 ) 3 e t o n ( 00 4 5 . 0 01 6 3 3 3 . 0 10 8 5 2 . 0 11 2 1 7 6 1 . 0 a q01 4 5 50 2 1 00 4 1 01 6 7 6 6 . 0 10 8 5 . 0 11 2 1 3 3 3 . 0 a q10 6 6 6 . 6 30 8 00 4 5 . 1 01 6 1 10 8 5 7 . 0 11 2 1 5 . 0 a q11 8 5 . 7 20 6 01 4 2 01 6 3 3 3 . 1 10 8 1 11 2 1 7 6 6 . 0 . z h m 0 8 4 o t z h m 0 2 2 s i e g n a r y c n e u q e r f o c v : 1 e t o n ; r e i l p i t l u m e h t s e m i t y c n e u q e r f x k l c o t l a u q e y c n e u q e r f t u p t u o b q : 2 e t o n . x k l c o t l a u q e y c n e u q e r f t u p t u o a q v r o f d i l a v z h m 0 4 2 f o y c n e u q e r f m u m i x a m : 3 e t o n c c . y l n o % 5 v 3 . 3 =
8752cy www.idt.com rev. c july 2, 2010 5 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer t able 5a. p ower s upply dc c haracteristics , v dd = v dda = v ddo = 3.3v5%, t a = 0c to 70c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. a bsolute m aximum r atings supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5v outputs, v o -0.5v to v ddo + 0.5v package thermal impedance, ja 47.9c/w (0 lfpm) storage temperature, t stg -65c to 150c t able 5b. p ower s upply dc c haracteristics , v dd = v dda = v ddo = 2.5v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v a d d e g a t l o v y l p p u s g o l a n a 5 3 1 . 33 . 35 6 4 . 3v v o d d e g a t l o v y l p p u s t u p t u o 5 3 1 . 33 . 35 6 4 . 3v i d d t n e r r u c y l p p u s r e w o p 5 0 1a m i a d d t n e r r u c y l p p u s g o l a n a 5 1a m i o d d t n e r r u c y l p p u s t u p t u o 0 2a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 7 3 . 25 . 25 2 6 . 2v v a d d e g a t l o v y l p p u s g o l a n a 5 7 3 . 25 . 25 2 6 . 2v v o d d e g a t l o v y l p p u s t u p t u o 5 7 3 . 25 . 25 2 6 . 2v i d d t n e r r u c y l p p u s r e w o p 0 0 1a m i a d d t n e r r u c y l p p u s g o l a n a 5 1a m i o d d t n e r r u c y l p p u s t u p t u o 0 2a m
8752cy www.idt.com rev. c july 2, 2010 6 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer t able 6a. pll i nput r eference c haracteristics , v dd = v dda = v ddo = 3.3v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f f e r y c n e u q e r f e c n e r e f e r t u p n i y b d e t i m i l s i y c n e u q e r f e c n e r e f e r t u p n i : e t o n . e g n a r k c o l o c v e h t d n a n o i t c e l e s r e d i v i d e h t 0 20 4 2z h m t able 5b. lvcmos/lvttl dc c haracteristics , v dd = v dda = v ddo = 3.3v5% or 2.5v5%, t a = 0c to 70c t able 6b. pll i nput r eference c haracteristics , v dd = v dda = v ddo = 2.5v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f f e r y c n e u q e r f e c n e r e f e r t u p n i y b d e t i m i l s i y c n e u q e r f e c n e r e f e r t u p n i : e t o n . e g n a r k c o l o c v e h t d n a n o i t c e l e s r e d i v i d e h t 0 20 2 1z h m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i v d d v 3 . 3 =2v d d 3 . 0 +v v d d v 5 . 2 =7 . 1v d d 3 . 0 +v v l i e g a t l o v w o l t u p n i v d d v 3 . 3 =3 . 0 -8 . 0v v d d v 5 . 2 =3 . 0 -7 . 0v i h i t u p n i t n e r r u c h g i h , 0 x l e s _ v i d , 0 k l c , 1 x l e s _ v i d , l e s _ k l c , n i _ b f , 1 k l c e o n / r m v d d =v n i v 5 6 4 . 3 = v 5 2 6 . 2 r o 0 5 1a l e s _ l l p v d d =v n i v 5 6 4 . 3 = v 5 2 6 . 2 r o 5a i l i t u p n i t n e r r u c w o l , 0 x l e s _ v i d , 0 k l c , 1 x l e s _ v i d , l e s _ k l c , n i _ b f , 1 k l c e o n / r m v d d =, v 5 2 6 . 2 r o v 5 6 4 . 3 v n i v 0 = 5 -a l e s _ l l p v d d =, v 5 2 6 . 2 r o v 5 6 4 . 3 v n i v 0 = 0 5 1 -a v h o 1 e t o n ; e g a t l o v h g i h t u p t u o v o d d =v n i v 5 6 4 . 3 =6 . 2v v o d d =v n i v 5 2 6 . 2 =8 . 1v v l o 1 e t o n ; e g a t l o v w o l t u p t u o 5 . 0v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n v o t o d d , n o i t c e s n o i t a m r o f n i t n e m e r u s a e m r e t e m a r a p e e s . 2 / . s m a r g a i d " t i u c r i c t s e t d a o l t u p t u o "
8752cy www.idt.com rev. c july 2, 2010 7 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer t able 7a. ac c haracteristics , v dd = v dda = v ddo = 3.3v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o ) e d o m l l p ( y c n e u q e r f t u p t u o 2 0 1 10 4 2z h m 4 5 50 2 1z h m 6 7 6 . 6 30 8z h m 8 5 . 7 20 6z h m 1 2 3 3 . 8 10 4z h m f o c v e g n a r k c o l o c v l l p 0 2 20 8 4z h m ) ? ( t1 e t o n ; t e s f f o e s a h p c i t a t s , z h m 0 0 4 = o c v f 8 k c a b d e e f 0 3 -0 70 7 1s p t ) b ( k s4 , 2 e t o n ; w e k s k n a b e g d e g n i s i r n o d e r u s a e m v t a o d d 2 / 5 5s p t ) o ( k s4 , 3 e t o n ; w e k s t u p t u o e g d e g n i s i r n o d e r u s a e m v t a o d d 2 / 0 0 1s p t ) c c ( t i j e l c y c - o t - e l c y c 4 e t o n ; r e t t i j s e i c n e u q e r f t n e r e f f i d s k n a b t n e r e f f i d n o 0 0 4s p t a s t u p t u o l l a y c n e u q e r f e m a s 5 7s p t l e m i t k c o l l l p 1s m t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 40 5 9s p c d oe l c y c y t u d t u p t u o 7 40 53 5% f t a d e r u s a e m s r e t e m a r a p l l a x a m . e s i w r e h t o d e t o n s s e l n u , l a n g i s t u p n i k c a b d e e f e g a r e v a e h t d n a k c o l c t u p n i e h t n e e w t e b e c n e r e f f i d e m i t e h t s a d e n i f e d : 1 e t o n . e l b a t s s i y c n e u q e r f e c n e r e f e r t u p n i e h t d n a d e k c o l s i l l p e h t n e h w . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o f o k n a b a n i h t i w w e k s s a d e n i f e d : 2 e t o n . s n o i t i d n o c d a o l l a u q e h t i w d n a e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 3 e t o n v t a d e r u s a e m o d d . 2 / . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 4 e t o n
8752cy www.idt.com rev. c july 2, 2010 8 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer t able 7b. ac c haracteristics , v dd = v dda = v ddo = 2.5v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o ) e d o m l l p ( y c n e u q e r f t u p t u o 2 0 1 10 4 2z h m 4 5 50 2 1z h m 6 7 6 . 6 30 8z h m 8 5 . 7 20 6z h m 1 2 3 3 . 8 10 4z h m f o c v e g n a r k c o l o c v l l p 0 2 20 8 4z h m ) ? ( t1 e t o n ; t e s f f o e s a h p c i t a t s z h m 0 0 4 = o c v f 8 k c a b d e e f 0 9 -0 50 9 1s p t ) b ( k s4 , 2 e t o n ; w e k s k n a b e g d e g n i s i r n o d e r u s a e m v t a o d d 2 / 5 5s p t ) o ( k s4 , 3 e t o n ; w e k s t u p t u o e g d e g n i s i r n o d e r u s a e m v t a o d d 2 / 0 9s p t ) c c ( t i j e l c y c - o t - e l c y c 4 e t o n ; r e t t i j s e i c n e u q e r f t n e r e f f i d s k n a b t n e r e f f i d n o 0 0 4s p t a s t u p t u o l l a y c n e u q e r f e m a s 5 7s p t l e m i t k c o l l l p 1s m t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 40 5 9s p c d oe l c y c y t u d t u p t u o 5 40 55 5% f t a d e r u s a e m s r e t e m a r a p l l a x a m . e s i w r e h t o d e t o n s s e l n u , l a n g i s t u p n i k c a b d e e f e g a r e v a e h t d n a k c o l c t u p n i e h t n e e w t e b e c n e r e f f i d e m i t e h t s a d e n i f e d : 1 e t o n . e l b a t s s i y c n e u q e r f e c n e r e f e r t u p n i e h t d n a d e k c o l s i l l p e h t n e h w . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o f o k n a b a n i h t i w w e k s s a d e n i f e d : 2 e t o n . s n o i t i d n o c d a o l l a u q e h t i w d n a e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 3 e t o n v t a d e r u s a e m o d d . 2 / . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 4 e t o n
8752cy www.idt.com rev. c july 2, 2010 9 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer 3.3v o utput l oad ac t est c ircuit (where x denotes outputs in the same bank) 2.5v o utput l oad ac t est c ircuit b ank s kew o utput s kew o utput d uty c ylcle /p ulse w idth /p eriod c ycle - to -c ycle j itter t jit(cc) = t cycle n ? t cycle n+1 1000 cycles s tatic p hase o ffset o utput r ise /f all t ime p arameter m easurement i nformation scope qx lvcmos 1.65v5% -1.65v5% t sk(o) v ddo 2 v ddo 2 qy qx qa0:qa3, qb0:qb3 ? ? ? ? v ddo 2 v ddo 2 v ddo 2 t cycle n t cycle n+1 t sk(b) v ddo 2 v ddo 2 ? ? t (?) v dd 2 v dd 2 clk0, clk1 fb_in qx0:qx3 qx0:qx3 t period t pw t period odc = v ddo 2 x 100% t pw clock outputs 20% 80% 80% 20% t r t f qa0:qa3, qb0:qb3 v dd , v dda ,v ddo gnd scope qx lvcmos 1.25v5% -1.25v5% v dd , v dda ,v ddo gnd
8752cy www.idt.com rev. c july 2, 2010 10 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer r eliability i nformation t ransistor c ount the transistor count for ICS8752 is: 1546 t able 7. ja vs . a ir f low t able for 32 l ead lqfp ja by velocity (linear feet per minute) 0 200 500 single-layer pcb, jedec standard test boards 67. 8c/w 55.9c/w 50.1c/w multi-layer pcb, jedec standard test boards 47. 9c/w 42.1c/w 39.4c/w note: most modern pcb designs use multi-layered boards. the data in the second row pertains to most designs. i nputs : clk i nput : for applications not requiring the use of a clock input, it can be left floating. though not required, but for additional protection, a 1k resistor can be tied from the clk input to ground. lvcmos c ontrol p ins : all control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. a 1k resistor can be used. r ecommendations for u nused i nput and o utput p ins o utputs : lvcmos o utput : all unused lvcmos output can be left floating. we recommend that there is no trace attached. a pplication i nformation
8752cy www.idt.com rev. c july 2, 2010 11 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer t able 8. p ackage d imensions reference document: jedec publication 95, ms-026 n o i t a i r a v c e d e j s r e t e m i l l i m n i s n o i s n e m i d l l a l o b m y s a b b m u m i n i ml a n i m o nm u m i x a m n 2 3 a - -- -0 6 . 1 1 a 5 0 . 0- -5 1 . 0 2 a 5 3 . 10 4 . 15 4 . 1 b 0 3 . 07 3 . 05 4 . 0 c 9 0 . 0- -0 2 . 0 d c i s a b 0 0 . 9 1 d c i s a b 0 0 . 7 2 d . f e r 0 6 . 5 e c i s a b 0 0 . 9 1 e c i s a b 0 0 . 7 2 e . f e r 0 6 . 5 e c i s a b 0 8 . 0 l 5 4 . 00 6 . 05 7 . 0 0 - - 7 c c c - -- -0 1 . 0 p ackage o utline - y s uffix for 32 l ead lqfp
8752cy www.idt.com rev. c july 2, 2010 12 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer t able 9. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated device technology, inc. ( idt) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patents, or licenses are impl ied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability, or other extraordinary environmental requirement s are not recommended without additional processing by idt. idt reserves the right to change any circuitry or specifications without notice. idt does not authorize or warrant any idt product for use i n life support devices or critical medical instruments. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t y c 2 5 7 8y c 2 5 7 8 s c ip f q l d a e l 2 3y a r tc 0 7 o t c 0 t y c 2 5 7 8y c 2 5 7 8 s c ip f q l d a e l 2 3l e e r & e p a t 0 0 0 1c 0 7 o t c 0 f l y c 2 5 7 8f l y c 2 5 7 8 s c ip f q l " e e r f - d a e l " d a e l 2 3y a r tc 0 7 o t c 0 t f l y c 2 5 7 8f l y c 2 5 7 8 s c ip f q l " e e r f - d a e l " d a e l 2 3l e e r & e p a t 0 0 0 1c 0 7 o t c 0 . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n
8752cy www.idt.com rev. c july 2, 2010 13 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer t e e h s y r o t s i h n o i s i v e r v e re l b a te g a pe g n a h c f o n o i t p i r c s e de t a d a1 t2 . n o i t p i r c s e d e o n / r m d e s i v e r . e l b a t s n o i t p i r c s e d n i p 2 0 / 9 1 / 8 b2 t 9 t 1 2 2 1 n o p u e l b a l i a v a e r u t a r e p m e t l a i r t s u d n i " , t e l l u b e t e l e d - n o i t c e s s e r u t a e f . t e l l u b e e r f - d a e l d e d d a " . t s e u q e r c d e g n a h c - e l b a t s c i t s i r e t c a r a h c n i p n i . l a c i p y t f p 4 o t . x a m f p 4 . e t o n d n a r e b m u n t r a p e e r f - d a e l d e d d a - e l b a t n o i t a m r o f n i g n i r e d r o . t a m r o f t e e h s a t a d d e t a d p u 5 0 / 1 3 / 3 b1 t2 . e o n / r m , 5 n i p t c e r r o c - e l b a t n o i t p i r c s e d n i p 5 0 / 2 / 5 b 9 t 0 1 2 1 d e d d a . s n i p t u p t u o d n a t u p n i d e s u n u r o f s n o i t a d n e m m o c e r . g n i k r a m e e r f - d a e l d e d d a - e l b a t n o i t a m r o f n i g n i r e d r o 5 0 / 9 1 / 0 1 c9 t2 1 4 1 . s c i m o r f t d i h t i w r e t o o f / r e d a e h s ' t e e h s a t a d d e t a d p u . n m u l o c r e b m u n r e d r o / t r a p m o r f x i f e r p " " s c i " " d e v o m e r . e g a p t c a t n o c d e d d a 0 1 / 2 / 7
8752cy www.idt.com rev. c july 2, 2010 14 ICS8752 l ow s kew , 1- to -8 lvcmos c lock m ultiplier /z ero d elay b uffer we?ve got your timing solution. sales 800-345-7015 (inside usa) +408-284-8200 (outside usa) fax: 408-284-2775 tech support netcom@idt.com 6024 silver creek valley road san jose, ca 95138 ? 2010 integrated device technology, inc. all rights reserved. product specifications subject to change without notice. idt, th e idt logo, ics and hiperclocks are trademarks of integrated device technology, inc. accelerated thinking is a service mark of integrated device technology, inc. all other brands, product names and marks are or m ay be trademarks or registered trademarks used to identify products or services of their respective owners. printed in usa

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